Course level

Undergraduate

Units

2

Duration

One Semester

Class hours

2 Lecture hours
2 Tutorial hours
2 Practical or Laboratory hours

Incompatible

COMP3100 or COMP3101 or COMP7100 or COMP7103 or CSSE7011

Prerequisite

CSSE2000

Assessment methods

Mid-sem, practical, & final exams

Course enquiries

Dr Adam Postula (adam@itee.uq.edu.au)

Study Abroad

This course is pre-approved for Study Abroad and Exchange students.

This course is not currently offered, please contact the school or faculty of your program.

Course description

[Not offered from 2012] This is a medium advanced course in digital system design. The objective of this course is to give the students the theoretical basis & practical skills in modern design of medium size digital systems in various technologies, including standard circuits & Field Programmable Gate Arrays (FPGAs). The design methodology, systematically introduced & used in the course, is based on simulation & synthesis with the hardware description language (VHDL) tools. Topics covered in this course include: conceptual design step from requirements & specification to simulation & synthesis model in VHDL, design of complex controllers with Finite State Machines, design of sequential blocks with Controller-Datapath methodology, issues in design for testability, issues in timing of sequential logic, overview of implementation technologies with emphasis on FPGAs. All those topics are presented with the theoretical part directly relating to the number of design examples & problems tackled in the tutorials and practicals.